Loop Tiling for Parallelism - the Springer International Series in Engineering and Computer Science - Jingling Xue - Books - Kluwer Academic Publishers - 9780792379331 - August 31, 2000
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Jingling Xue
Loop Tiling for Parallelism - the Springer International Series in Engineering and Computer Science 2000 edition

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Loop tiling, as one of the important compiler optimizations, is beneficial for both parallel machines and uniprocessors with a memory hierarchy. This book explores the use of loop tiling for reducing communication cost and improving parallelism for distributed memory machines.

256 pages, biography

Media Books     Hardcover Book   (Book with hard spine and cover)
Released August 31, 2000
ISBN13 9780792379331
Publishers Kluwer Academic Publishers
Pages 256
Dimensions 156 × 234 × 17 mm   ·   566 g
Language English  

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