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Vhdl Modeling for Digital Design Synthesis Yu-chin Hsu 1995 edition
Vhdl Modeling for Digital Design Synthesis
Yu-chin Hsu
VHDL is a hardware description language that allows the specification of a digital system over different levels of abstraction. This text covers the synthesis aspects of VHDL, keeping the simulation specifics to a minimum.
356 pages, biography
| Media | Books Hardcover Book (Book with hard spine and cover) |
| Released | July 31, 1995 |
| ISBN13 | 9780792395973 |
| Publishers | Kluwer Academic Publishers |
| Pages | 356 |
| Dimensions | 155 × 235 × 22 mm · 734 g |
| Language | English |