Chip Multiprocessor Architecture: Techniques to Improve Throughput and Latency - Synthesis Lectures on Computer Architecture - Kunle Olukotun - Books - Springer International Publishing AG - 9783031005923 - December 31, 2007
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Kunle Olukotun
Chip Multiprocessor Architecture: Techniques to Improve Throughput and Latency - Synthesis Lectures on Computer Architecture

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The exact size of a CMP's cores can vary from very simple pipelines to moderately complex superscalar processors, but once a core has been selected the CMP's performance can easily scale across silicon process generations simply by stamping down more copies of the hard-to-design, high-speed processor core in each successive chip generation.

145 pages, VIII, 145 p.

Media Books     Paperback Book   (Book with soft cover and glued back)
Released December 31, 2007
ISBN13 9783031005923
Publishers Springer International Publishing AG
Pages 145
Dimensions 190 × 235 × 12 mm   ·   302 g
Language English  

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