CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware SRAM Design and Test - Frontiers in Electronic Testing - Andrei Pavlov - Books - Springer - 9789048178551 - October 28, 2010
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CMOS SRAM Circuit Design and Parametric Test in Nano-Scaled Technologies: Process-Aware SRAM Design and Test - Frontiers in Electronic Testing Softcover reprint of hardcover 1st ed. 2008 edition

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The monograph will be dedicated to SRAM (memory) design and test issues in nano-scaled technologies by adapting the cell design and chip design considerations to the growing process variations with associated test issues. Purpose: provide process-aware solutions for SRAM design and test challenges.


210 pages, biography

Media Books     Paperback Book   (Book with soft cover and glued back)
Released October 28, 2010
ISBN13 9789048178551
Publishers Springer
Pages 194
Dimensions 155 × 235 × 11 mm   ·   303 g
Language English  

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